Aojie Jiang | Nanjing University

About Me

Hi! I am a 3th-year Master candidate in the School of Electronic Science and Engineering at Nanjing University. I am supervised by Professor Yuan Du and Li Du at ISCL lab. My research interests include efficient inference of AI algorithms (such as quantization and pruning) and hardware acceleration for AI. I also have a great interest in the architecture of NPU/GPU and high-performance FPGA design.

If you have any questions or cooperation, please feel free to contact me.

Research Interests

Software: Quantization or Compression methods for CNN and LLMs
Hardware: Efficient hardware acceleration for AI algorithms

Now, I am focusing on the domain specific systems for efficient LLM deployment

News

[Nov. 2024] I have been awarded the National Scholarship.
[Jan. 2024] My paper about software and hardware Co-design for CNN is accepted to IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD,CCF-A).

Internship

[Jun. 2024 - Sep. 2024] Research Intern as a chip architect in Penglai Lab at Tencent(ShenZhen)

Publications

TCAD

GroupQ: Group-Wise Quantization With Multi-Objective Optimization for CNN Accelerators

Aojie Jiang, Li Du*, Yuan Du*(*Corresponding authors)

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(CCF-A)

PDF Accept